FPGA Design with Chisel

Hardware description languages, like Verilog and VHDL, have been used since the early 1980s to describe all types of digital circuts: everything from simple logic devices to modern microprocessors. While these languages are still widely considered to be industry-standard, their tooling and ergonomics have fallen far behind modern software development best-practices. Chisel is an open-source digital design tool that leverages the Scala programming language, providing designers with the power of a modern programming language to describe complex digital circuits. Importantly, it also enables the use of many modern software engineering practices (e.g unit testing, static analysis, CI, etc.). Chisel is not a toy — it was most notably used by the Chips Alliance (Linux Foundation) to implement the open-source Rocket Chip RISC-V processor core (https://github.com/chipsalliance/rocket-chip). It was also used by Google to develop the edge tensor processing unit ASIC (https://cloud.google.com/edge-tpu). This talk aims to give an introduction to Chisel, and showcase how it can be used to create digital designs that are expressive, well-tested, and maintainable.